The present invention relates to information handling systems, and more particularly to direct memory access of memory in personal computer systems.
Generally in computer systems and especially in personal computer systems, data are transferred between various elements such as a central processing unit (CPU), memory devices and direct memory access (DMA) control circuitry as well as expansion devices such as input/output (I/O) adapters, bus controllers (i.e., elements which can control the computer system), bus slaves (i.e., elements which are controlled by bus controllers). The expansion devices are often interconnected via a system I/O bus. The DMA control circuitry is used to transfer information to and from memory devices without using the CPU; generally, once the CPU has provided the DMA control circuitry with control information such as the base location from where information is to be moved, the address of where the data information should go, and the size of the data information to be moved, the DMA control circuitry controls the transfer of the data information.
It is known to provide the DMA control circuitry with a plurality of channels, each channel being capable of independent memory transfers. An example of the use of plural DMA channels is when information which is stored on a hard disk is backed up. In this case, the information is received from the hard disk and is provided directly to a backup device via the DMA control circuitry. While this backup is occurring, other memory transfers may be conducted using the other DMA channels. Often, in order to provide plural DMA channels, it is necessary to provide respective buffer circuits via which data information is transferred.
Often, during operation of the computer system, it is desirable to switch control between the different channels of the DMA control circuitry. During such switching of control, it is sometimes necessary to change the configuation of the DMA control circuitry in order to accomodate the different channel. When switching between channels it is desirable to quickly configure the DMA control circuitry for the new configuration.
It is also often desirable to switch the configuration of the DMA control circuitry based upon the width of the device being accessed during contiguous cycles of a particular channel. In order to switch the configuration of the DMA control circuitry, DMA control information, which is used to accomplish DMA transfers, is updated. The control information may include transfer count information, address and byte enable information as well as terminal count information, which indicates when to terminate a particular DMA transfer.